集成电路测试的目的是希望在一批器件中找出有缺陷的器件，从而将交付的DPPM(每百万器件中的缺陷器件数目)降低至100以下。通过对自动测试图样生成(ATPG)算法进行一些设计修改，就可能在合理的测试图样数目下达到较高的缺陷覆盖率。本文描述了在评估不同 ...

芯片设计解决方案供应公司微捷码(Magma)设计自动化公司，发表有片上扫描链压缩功能的Talus ATPG与Talus ATPGX。这些先进的自动测试向量生成(ATPG)产品使设计师能明显改进测试质量，减少周转时间并且降低纳米级芯片的成本。 芯片设计解决方案供应公司微捷码 ...

VLSI or Very Large Scale Integration has emerged as a crucial field in electronics engineering over the past few years. With the manufacture of complex integrated circuits (ICs) with millions of ...

As chips get ever bigger and more complex, the electronic design automation (EDA) industry must innovate constantly to keep up. Engineers expect every new generation of silicon to be modeled, ...

ATPG targets faults at IC-gate boundaries, but 50% of defects are located within cells. Learn how cell-aware ATPG and user-defined fault models help to ferret out these hard-to-squash bugs.

Automatic test-pattern generation (ATPG) has played a key role in semiconductor logic test, but several trends driving the need for semiconductor test quality are challenging traditional ATPG tools.

Design for Test (DFT) is a name for design techniques that add certain testability features to a microelectronic hardware product design. The premise of the added features is that they make it easier ...

Chipmakers worldwide consider Automatic Test Pattern Generation (ATPG) their go-to method for achieving high test coverage in production. ATPG generates test patterns designed to detect faults in the ...